Hardware Security of Emerging Non-volatile Memory Devices under Imaging Attacks

The emerging non-volatile memory (NVM) devices change the landscape of computing hardware due to the sub-10 nm scalability and performances comparable to Flash, Static Random-Access Memory (SRAM), and Dynamic Random Access Memory (DRAM). Despite remarkable advances in researching, developing, and prototyping the emerging NVM devices, security vulnerability remains relatively unexplored in the field. This is a critical research problem because given that they are non-volatile, the stored information may be vulnerable to various physical attacks unless adequately encrypted. This work investigated the security vulnerability of two emerging NVM device candidates (spin-transfer torque magnetic random-access memory (STT-MRAM) and resistive random-access memory (RRAM)) against the most commonly available, non-destructive physical attack scenario – Scanning Electron Microscope (SEM) imaging. In this thesis, the emerging NVM cells are programmed to either a low-resistance state (LRS) or high-resistance state (HRS) using the semiconductor parameter analyzer (Keithley 4200A) attached to the probe station (Cascade Summit 11000B). After the programming steps, the samples were examined in the SEM (Hitachi SU1510) in the various modes. The central premise is that if any difference in memory cells in high resistance and low resistance (bit '1' and bit '0') states can be easily detected in SEM, stored data could leak or be stolen by adversaries. It is found that unless adversaries understand the physical mechanism of emerging NVM devices and adopt advanced analysis techniques (e.g., energy dispersive x-ray spectroscopy), it is very unlikely that the bit information stored in these memory cells leak out by SEM imaging attacks.