A Performance-Based Adaptive Physical Register Capping System for Simultaneous Multi-Threading Processors

dc.contributor.advisorLin, Wei M.
dc.contributor.authorNguyen, San
dc.contributor.committeeMemberJohn, Eugene
dc.contributor.committeeMemberKrishnan, Ram
dc.creator.orcidhttps://orcid.org/0000-0002-7759-683X
dc.date.accessioned2024-02-12T18:28:44Z
dc.date.available2024-02-12T18:28:44Z
dc.date.issued2020
dc.descriptionThis item is available only to currently enrolled UTSA students, faculty or staff. To download, navigate to Log In in the top right-hand corner of this screen, then select Log in with my UTSA ID.
dc.description.abstractSimultaneous Multi-Threading (SMT) processors allows concurrent execution of multiple independent threads to increase the performance by having better resource utilization in comparison to superscalar processors. The Physical Register Rename File is a shared resource among all threads to map architectural registers to a physical register. Once all available physical register are use, then the system is stalled to add new instructions for execution until a thread de-allocates one or more physical registers. In this paper, we propose a capping system to partition the physical register to each thread such that threads that can execute more instructions during a time frame will be given more physical register to use. While preventing threads that execute more slowly will have lower occupancy in the register file. By doing this, an average improvement in IPC increases by 49.6%, 51.3% and 43% for 4/6/8-threads, respectively.
dc.description.departmentElectrical and Computer Engineering
dc.format.extent35 pages
dc.format.mimetypeapplication/pdf
dc.identifier.isbn9798607391775
dc.identifier.urihttps://hdl.handle.net/20.500.12588/4715
dc.languageen
dc.subjectMulti-threading processors
dc.subjectPhysical register capping system
dc.subjectSuperscalar processors
dc.subject.classificationComputer engineering
dc.titleA Performance-Based Adaptive Physical Register Capping System for Simultaneous Multi-Threading Processors
dc.typeThesis
dc.type.dcmiText
dcterms.accessRightspq_closed
thesis.degree.departmentElectrical and Computer Engineering
thesis.degree.grantorUniversity of Texas at San Antonio
thesis.degree.levelMasters
thesis.degree.nameMaster of Science

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