The implementation of integer-slant transform in FPGA device

dc.contributor.advisorAgaian, Sos
dc.contributor.authorSaeed, Syyf Q.
dc.contributor.committeeMemberLiu, Bao
dc.contributor.committeeMemberAkopian, David
dc.date.accessioned2024-02-12T20:02:48Z
dc.date.available2024-02-12T20:02:48Z
dc.date.issued2013
dc.descriptionThis item is available only to currently enrolled UTSA students, faculty or staff. To download, navigate to Log In in the top right-hand corner of this screen, then select Log in with my UTSA ID.
dc.description.abstractOrthogonal transforms have revolutionized the signal processing industry especially in the field of electronic imagery. The wide growth of production has increased demand for more desirable qualities and capabilities that exist as properties in few orthogonal transforms such as Discrete Cosine Transform DCT which is widely used for image and video compression applications and is adopted by many international standards such as JPEG, MPEG1, MPEG2,etc. However it is difficult to satisfy the requirement for real-time by software owing to its heavy quantity of computing. Therefore, a hardware method is adopted to satisfy the requirement for speed in many practical applications.. In fact, in known perception, hardware serves as a platform for software and this is the main reason for its existence. However, with the recent developments in electronics technology during the last decades this perception has changed letting the hardware systems serve a full solution to most of the electronic systems. This thesis describes the FPGA implementation of two dimensional Integer-Slant Transform processor with Verilog HDL for application of image processing. The row-column decomposition algorithm and pipelining are used to produce the high quality circuit design with optimized clock frequency when implemented in Xilinx Virtex-4 .The thesis is encouraging the adoption of the Integer-Slant Transform as an alternative to the widely used DCT in image processing for specific applications, because of its similar energy compaction property and the fact that the slant basis vector is tailored to achieve optimal representation for images with gradual brightness variation along the image line.
dc.description.departmentElectrical and Computer Engineering
dc.format.extent96 pages
dc.format.mimetypeapplication/pdf
dc.identifier.isbn9781303392559
dc.identifier.urihttps://hdl.handle.net/20.500.12588/5392
dc.languageen
dc.subjectFPGA
dc.subjectHardware
dc.subjectImage coding
dc.subjectpipelining
dc.subjectRow column decomposition
dc.subjectSlant Transform
dc.subject.classificationComputer engineering
dc.subject.classificationElectrical engineering
dc.titleThe implementation of integer-slant transform in FPGA device
dc.typeThesis
dc.type.dcmiText
dcterms.accessRightspq_closed
thesis.degree.departmentElectrical and Computer Engineering
thesis.degree.grantorUniversity of Texas at San Antonio
thesis.degree.levelMasters
thesis.degree.nameMaster of Science

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