Selective context blocking after branch performance evaluation for improving SMT performance

dc.contributor.advisorLin, Wei-Ming
dc.contributor.authorTalegaon, Samir
dc.contributor.committeeMemberLin, Wei-Ming
dc.contributor.committeeMemberJohn, Eugene
dc.contributor.committeeMemberLiu, Bao
dc.date.accessioned2024-03-08T15:44:13Z
dc.date.available2024-03-08T15:44:13Z
dc.date.issued2014
dc.descriptionThis item is available only to currently enrolled UTSA students, faculty or staff. To download, navigate to Log In in the top right-hand corner of this screen, then select Log in with my UTSA ID.
dc.description.abstractSimultaneous Multi-Threading (SMT) is a technique by which multiple independent threads can be simultaneously executed and it increases the system throughput. For further improving the performance of the machine one more technique known as pipelining is implemented. Pipelining allows the SMT machine to execute more than one function in the same cycle. Pipelining optimizes several processes such as fetch, decode, dispatch, issue, execute and commit. Our focus is on the Dispatch Cycle in which instructions get Dispatched from the individual re-order buffers to the shared Issue Queue. Branch Miss-Prediction reduces the throughput of SMT machine due to the instruction flush-outs. The pipeline then has to be refilled starting from the branch instruction, after changing the branch direction. It causes a delay in the pipeline after which instructions will start to commit from that particular thread and this affects the overall system throughput adversely. Our approach is to implement a technique called as selective context blocking after context-branch evaluation. According to this technique the number of instructions a thread is allowed to dispatch is controlled, if it has a higher Branch Miss-Prediction percentage within the past certain number of Branch Instructions. As a result of this we get an overall throughput increase of up to 4 % in the performance when compared to the default algorithm.
dc.description.departmentElectrical and Computer Engineering
dc.format.extent35 pages
dc.format.mimetypeapplication/pdf
dc.identifier.isbn9781321195002
dc.identifier.urihttps://hdl.handle.net/20.500.12588/5688
dc.languageen
dc.subjectBranch Miss-Prediction
dc.subjectInstruction Flush-Outs
dc.subjectPipelining
dc.subjectSMT
dc.subject.classificationElectrical engineering
dc.titleSelective context blocking after branch performance evaluation for improving SMT performance
dc.typeThesis
dc.type.dcmiText
dcterms.accessRightspq_closed
thesis.degree.departmentElectrical and Computer Engineering
thesis.degree.grantorUniversity of Texas at San Antonio
thesis.degree.levelMasters
thesis.degree.nameMaster of Science

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