Applied Artificial Neural Network for Nuclear Cyber Forensics Using a Field Programmable Gate Array
dc.contributor.advisor | Alamaniotis, Miltos | |
dc.contributor.author | Kelps, Bryan | |
dc.contributor.committeeMember | Ahmed, Sara | |
dc.contributor.committeeMember | John, Eugene | |
dc.date.accessioned | 2024-03-26T22:49:47Z | |
dc.date.available | 2024-03-26T22:49:47Z | |
dc.date.issued | 2023 | |
dc.description.abstract | Critical infrastructure for cities and countries are becoming increasingly vulnerable. There has been a history of various attacks on energy generation to include Nuclear Power Plants(NPP). To defend against cyber-attacks against NPPs, many solutions have been proposed. Some of those include using traditional software security measure, software-based neural networks, and FPGAs to filter malicious and benign network traffic using whitelists. This thesis proposes using an Artificial Neural Network on an FPGA to determine the maliciousness of network traffic. This will have the advantage of speed due to hardware advantages, and ANNs are quick to compute once trained. The Arty A7-100T was the development board selected for implementation, and the board hosts the XC7A100TICSG324-1 FPGA with MicroBlaze processor capabilities. The system was able to successful simulate an accurate prediction of connections within 1.5 microseconds. | |
dc.description.department | Electrical and Computer Engineering | |
dc.format.extent | 1 electronic resource (81 pages) | |
dc.format.mimetype | application/pdf | |
dc.identifier.isbn | 9798381181715 | |
dc.identifier.uri | https://hdl.handle.net/20.500.12588/6287 | |
dc.language | eng | |
dc.subject | Artificial Neural Network | |
dc.subject | CORDIC | |
dc.subject | Cyber Forensics | |
dc.subject | FPGA | |
dc.subject | Nuclear | |
dc.subject.classification | Electrical engineering | |
dc.subject.classification | Artificial intelligence | |
dc.subject.classification | Computer engineering | |
dc.title | Applied Artificial Neural Network for Nuclear Cyber Forensics Using a Field Programmable Gate Array | |
dc.type | Thesis | |
dc.type.dcmi | Text | |
thesis.degree.department | Electrical and Computer Engineering | |
thesis.degree.grantor | University of Texas at San Antonio | |
thesis.degree.level | Masters | |
thesis.degree.name | Master of Science |
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