Analysis of shared memory in multi-core systems




V. S. L. V. N, Jaya Chaitanya

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In a multi-core system, the memory hierarchy and the interconnection network play a dominant role in deciding the performance of the system. In this research, we analyze the dependence of system performance on the interconnection network and memory hierarchy using a set of scientific and engineering workloads. A configuration with a smaller network has low memory access latency, but is more susceptible to memory access conflicts due to fewer memory banks. The extra delay originated from the concurrent memory access conflicts may offset the benefit of shorter latency. So, in this case a larger network with more number of memory banks can benefit from high number of concurrent memory access. This analysis reveals an important tradeoff between employing different sizes of network. Cache sharing on a multi-core processor is usually competitive. Cache coherence problems associated with private caches and the improvement in performance with sharing is analyzed in the last chapter.


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Apllied sciences



Electrical and Computer Engineering